14. Coprocessor 0

14.11 Cause Register (13)

Figure 14-13 shows the fields of this register; Table 14-12 describes the Cause register fields. A 5-bit exception code (ExcCode) indicates one of the causes, as listed in Table 14-13.

All bits in the Cause register, with the exception of the IP[1:0] bits, are read-only; IP[1:0] are used for software interrupts.

Table 14-12 Cause Register Fields

Figure 14-13 Cause Register Format

Table 14-13 Cause Register ExcCode Field